Embodiments of the present invention relate in general to an out-of-order (OoO) processor and more specifically to an effective address table (EAT) data structure that can allow multiple taken branches to utilize the same EAT.
In an OoO processor, an instruction sequencing unit (ISU) dispatches instructions to various issue queues, renames registers in support of OoO execution, issues instructions from the various issue queues to the execution pipelines, completes executed instructions, and handles exception conditions. Register renaming is typically performed by mapper logic in the ISU before the instructions are placed in their respective issue queues. The ISU includes one or more issue queues that contain dependency matrices for tracking dependencies between instructions. A dependency matrix typically includes one row and one column for each instruction in the issue queue.
The EAT data structure is often used by OoO processors. The EAT is typically comprised of one or more entries with each entry having a plurality of fields of information associated with a group of instructions. Each entry in the EAT is created in response to a fetch of an instruction type requiring a new cache line of the OoO processor. A branch instruction in which a branch is taken is an instruction that requires a new EAT entry. Accordingly, with each branch taken a new EAT entry is required causing the size of the EAT data structure to increase.